| 04_knowledge_base/Kirin 9030 | 63 |
| 02_companies/Huawei | 55 |
| 04_knowledge_base/SMIC N+3 | 48 |
| 02_companies/SMIC | 40 |
| 02_companies/INTC | 32 |
| 04_knowledge_base/Transistor | 23 |
| 04_knowledge_base/SRAM | 21 |
| 02_companies/2330 台積電 | 19 |
| 04_knowledge_base/Contact | 18 |
| 04_knowledge_base/Helio G99 | 17 |
| 04_knowledge_base/TSMC N6 | 17 |
| 04_knowledge_base/EUV | 16 |
| 04_knowledge_base/Interposer | 16 |
| 04_knowledge_base/CPU | 16 |
| 04_knowledge_base/SoC | 13 |
| 04_knowledge_base/DUV | 12 |
| 04_knowledge_base/RDL | 12 |
| 04_knowledge_base/GPU | 12 |
| 04_knowledge_base/Single-Level Cell | 11 |
| 04_knowledge_base/基板 | 10 |
| 02_companies/AAPL | 10 |
| 04_knowledge_base/DTCO | 10 |
| 04_knowledge_base/5nm | 9 |
| 04_knowledge_base/PMOS | 9 |
| 04_knowledge_base/Intel 18A | 8 |
| 04_knowledge_base/Electronic Design Automation | 8 |
| 04_knowledge_base/SAQP | 8 |
| 03_industries/Foundry | 8 |
| 04_knowledge_base/NMOS | 8 |
| 04_knowledge_base/DRAM | 7 |
| 04_knowledge_base/Copper | 6 |
| 04_knowledge_base/Neural processing unit | 6 |
| 04_knowledge_base/Leading-Edge Node | 6 |
| 04_knowledge_base/Interconnect Stack | 6 |
| 04_knowledge_base/L2 cache | 6 |
| 04_knowledge_base/Multi-Patterning | 6 |
| 04_knowledge_base/封裝 | 5 |
| 02_companies/LITE | 5 |
| 04_knowledge_base/Self-aligned double patterning | 5 |
| 04_knowledge_base/Standard cell | 5 |
| 04_knowledge_base/FinFET | 5 |
| 04_knowledge_base/7nm | 5 |
| 04_knowledge_base/PCB | 4 |
| 02_companies/CXMT | 4 |
| 02_companies/QCOM | 4 |
| 04_knowledge_base/Huawei Ascend | 4 |
| 04_knowledge_base/LPDDR5X | 4 |
| 04_knowledge_base/Microsoft Cobalt | 4 |
| 02_companies/HiSilicon | 4 |
| 04_knowledge_base/Underfill | 4 |
| 04_knowledge_base/ABF | 3 |
| 02_companies/AMD | 3 |
| 02_companies/MediaTek | 3 |
| 04_knowledge_base/Tungsten | 3 |
| 04_knowledge_base/Backside contacts | 3 |
| 04_knowledge_base/TSMC N5 | 3 |
| 04_knowledge_base/Embedded Silicon-Germanium (eSiGe) | 3 |
| 04_knowledge_base/TSMC N3P | 3 |
| 04_knowledge_base/Backside Power Delivery | 3 |
| 04_knowledge_base/Transistor Density | 3 |
| 04_knowledge_base/Overlay | 3 |
| 04_knowledge_base/HAADF | 3 |
| 04_knowledge_base/Metal pitch | 3 |
| 04_knowledge_base/A16 | 2 |
| 02_companies/Cadence Design Systems | 2 |
| 02_companies/Switch | 2 |
| 04_knowledge_base/Semiconductor PPA | 2 |
| 04_knowledge_base/Tungsten plug | 2 |
| 02_companies/SNPS | 2 |
| 04_knowledge_base/FEOL | 2 |
| 04_knowledge_base/SF4 | 2 |
| 04_knowledge_base/STCO | 2 |
| 04_knowledge_base/PDK | 2 |
| 04_knowledge_base/微影製程 | 2 |
| 02_companies/Aligned Data Centers | 2 |
| 04_knowledge_base/Warpage | 2 |
| 04_knowledge_base/Semiconductor Fab | 2 |
| 04_knowledge_base/Solder Bump | 2 |
| 04_knowledge_base/Kirin 9000S | 2 |
| 04_knowledge_base/14nm | 2 |
| 04_knowledge_base/Aspect Ratio | 2 |
| 04_knowledge_base/Critical dimension | 2 |
| 04_knowledge_base/Power rail | 2 |
| 04_knowledge_base/Design Rule | 2 |
| 04_knowledge_base/Double Patterning | 2 |
| 04_knowledge_base/L3 cache | 2 |
| 04_knowledge_base/BGA | 2 |
| 04_knowledge_base/Metallization | 2 |
| 04_knowledge_base/BT樹脂 | 1 |
| 04_knowledge_base/N2 | 1 |
| 02_companies/005930 | 1 |
| 02_companies/2454 聯發科 | 1 |
| 04_knowledge_base/CPO | 1 |
| 04_knowledge_base/Hyperscaler | 1 |
| 02_companies/1347.HK | 1 |
| 04_knowledge_base/COUPE | 1 |
| 02_companies/ByteDance | 1 |
| 04_knowledge_base/SiCN | 1 |
| 04_knowledge_base/Line-edge roughness | 1 |
| 04_knowledge_base/3D integration | 1 |
| 04_knowledge_base/Hybrid Bonding | 1 |
| 04_knowledge_base/Integrated Package-on-Package (iPoP) | 1 |
| 04_knowledge_base/Intel 14A process node | 1 |
| 04_knowledge_base/τ scaling law | 1 |
| 02_companies/Cambricon Technologies | 1 |
| 02_companies/Together AI | 1 |
| 04_knowledge_base/Network on Chip | 1 |
| 04_knowledge_base/Contact Over Active Gate | 1 |
| 04_knowledge_base/Single Diffusion Break | 1 |
| 04_knowledge_base/Damascene process | 1 |
| 04_knowledge_base/Dennard scaling | 1 |
| 04_knowledge_base/Wafer thinning | 1 |
| 02_companies/imec | 1 |
| 04_knowledge_base/AMD MI450X | 1 |
| 04_knowledge_base/Contacted Gate Pitch | 1 |
| 02_companies/Hua Hong Semiconductor | 1 |
| 04_knowledge_base/Local Layout Effects | 1 |
| 04_knowledge_base/AI Accelerator | 1 |
| 04_knowledge_base/PowerVia | 1 |
| 04_knowledge_base/Electrical Integrated Circuit (EIC) | 1 |
| 04_knowledge_base/Optical Engine | 1 |
| 02_companies/IBM | 1 |
| 04_knowledge_base/TSMC N3E | 1 |
| 04_knowledge_base/Buried Power Rail | 1 |
| 04_knowledge_base/Energy-dispersive X-ray spectroscopy | 1 |
| 04_knowledge_base/Flip-Flop | 1 |
| 04_knowledge_base/Cortex-X2 | 1 |
| 04_knowledge_base/3D V-Cache | 1 |
| 04_knowledge_base/Flip-chip | 1 |
| 04_knowledge_base/System-Level Cache | 1 |
| 04_knowledge_base/FinFLEX | 1 |
| 04_knowledge_base/CMOS | 1 |
| 04_knowledge_base/Deposition | 1 |
| 04_knowledge_base/MI350X | 1 |
| 04_knowledge_base/Via | 1 |
| 04_knowledge_base/850 nm | 1 |
| 04_knowledge_base/Capacitor | 1 |
| 04_knowledge_base/M0 metal | 1 |
| 04_knowledge_base/Arithmetic Logic Unit | 1 |
| 04_knowledge_base/Firestorm Core | 1 |
| 04_knowledge_base/2nm | 1 |
| 04_knowledge_base/Coefficient of Thermal Expansion | 1 |