| 04_knowledge_base/Trainium | 315 |
| 04_knowledge_base/AWS | 122 |
| 02_companies/Switch | 74 |
| 02_companies/NVDA | 59 |
| 04_knowledge_base/Trn2 | 57 |
| 04_knowledge_base/PyTorch | 52 |
| 04_knowledge_base/PCIe | 51 |
| 04_knowledge_base/GPU | 32 |
| 04_knowledge_base/CPU | 28 |
| 04_knowledge_base/400G | 25 |
| 02_companies/Amazon | 23 |
| 04_knowledge_base/3D Torus | 20 |
| 02_companies/Anthropic | 19 |
| 04_knowledge_base/Nitro | 19 |
| 04_knowledge_base/JBOG | 19 |
| 04_knowledge_base/200G | 17 |
| 04_knowledge_base/MXFP8 | 16 |
| 04_knowledge_base/Backplane | 16 |
| 04_knowledge_base/Mixture of Experts | 15 |
| 02_companies/AMD | 15 |
| 04_knowledge_base/PCB | 15 |
| 04_knowledge_base/NIC | 15 |
| 04_knowledge_base/NeuronLink | 14 |
| 04_knowledge_base/UALink | 13 |
| 04_knowledge_base/BF16 | 13 |
| 04_knowledge_base/HBM | 11 |
| 04_knowledge_base/Scale-up network | 11 |
| 04_knowledge_base/Copper | 11 |
| 04_knowledge_base/Compute Tray | 11 |
| 04_knowledge_base/NeuronCore | 10 |
| 02_companies/META | 9 |
| 04_knowledge_base/TSMC N3P | 9 |
| 04_knowledge_base/NVIDIA Oberon | 9 |
| 04_knowledge_base/Systolic Array | 9 |
| 02_companies/3661 | 8 |
| 02_companies/GOOG | 8 |
| 04_knowledge_base/Fully Sharded Data Parallel | 8 |
| 04_knowledge_base/Active electrical cable | 8 |
| 04_knowledge_base/NVLink | 7 |
| 04_knowledge_base/液冷散熱 | 7 |
| 04_knowledge_base/NVFP4 | 7 |
| 04_knowledge_base/SRAM | 7 |
| 04_knowledge_base/TPU | 7 |
| 02_companies/OpenAI | 7 |
| 02_companies/Marvell | 7 |
| 04_knowledge_base/Interposer | 7 |
| 04_knowledge_base/XLA | 7 |
| 04_knowledge_base/Decode | 7 |
| 04_knowledge_base/MXFP4 | 7 |
| 04_knowledge_base/Power Density | 7 |
| 04_knowledge_base/vLLM | 6 |
| 04_knowledge_base/Chiplet architecture | 6 |
| 04_knowledge_base/GB200 | 6 |
| 04_knowledge_base/100G | 6 |
| 04_knowledge_base/Software Stack | 6 |
| 04_knowledge_base/Prefill | 6 |
| 04_knowledge_base/torch.compile | 6 |
| 02_companies/Together AI | 5 |
| 04_knowledge_base/SerDes | 5 |
| 02_companies/2330 台積電 | 5 |
| 04_knowledge_base/HBM3E | 5 |
| 02_companies/Credo Technology | 5 |
| 04_knowledge_base/Scale-out networking | 5 |
| 04_knowledge_base/FP4 | 5 |
| 02_companies/Annapurna Labs | 5 |
| 04_knowledge_base/Graviton4 | 5 |
| 04_knowledge_base/Expert Parallelism | 4 |
| 04_knowledge_base/InfiniBand | 4 |
| 04_knowledge_base/NVIDIA Inference Xfer Library (NIXL) | 4 |
| 04_knowledge_base/Ethernet | 4 |
| 04_knowledge_base/ASIC | 4 |
| 04_knowledge_base/CoWoS | 4 |
| 04_knowledge_base/AMD MI450X | 4 |
| 02_companies/GitHub | 4 |
| 04_knowledge_base/Hyperscaler | 4 |
| 04_knowledge_base/KV cache | 4 |
| 04_knowledge_base/3nm | 4 |
| 04_knowledge_base/VR NVL144 | 4 |
| 04_knowledge_base/E8M0 | 4 |
| 04_knowledge_base/Air cooling | 4 |
| 04_knowledge_base/GB200 NVL72 | 4 |
| 04_knowledge_base/DTCO | 3 |
| 02_companies/INTC | 3 |
| 02_companies/MU | 3 |
| 04_knowledge_base/H100 | 3 |
| 04_knowledge_base/RDL | 3 |
| 04_knowledge_base/CUDA | 3 |
| 04_knowledge_base/NVLink Fusion | 3 |
| 04_knowledge_base/Vera Rubin | 3 |
| 04_knowledge_base/FP8 | 3 |
| 04_knowledge_base/Copper-clad laminate | 3 |
| 04_knowledge_base/Qwen | 3 |
| 04_knowledge_base/800G | 3 |
| 04_knowledge_base/XPU | 3 |
| 04_knowledge_base/E4M3 | 3 |
| 04_knowledge_base/Chiller | 3 |
| 04_knowledge_base/PEX90144 | 3 |
| 04_knowledge_base/FSDP2 | 3 |
| 04_knowledge_base/FP32 | 3 |
| 04_knowledge_base/JAX | 3 |
| 04_knowledge_base/Batch size | 3 |
| 04_knowledge_base/x86 | 3 |
| 04_knowledge_base/Flyover cable | 2 |
| 04_knowledge_base/Semiconductor Physical Design | 2 |
| 04_knowledge_base/DDR5 | 2 |
| 04_knowledge_base/NVMe | 2 |
| 02_companies/000660 | 2 |
| 04_knowledge_base/TSMC N3E | 2 |
| 02_companies/AVGO | 2 |
| 04_knowledge_base/NVIDIA Collective Communications Library (NCCL) | 2 |
| 04_knowledge_base/Fiber interconnect | 2 |
| 04_knowledge_base/Trn3 | 2 |
| 04_knowledge_base/OSFP (Octal Small Form-factor Pluggable) | 2 |
| 04_knowledge_base/Fault tolerance | 2 |
| 04_knowledge_base/Large language model | 2 |
| 04_knowledge_base/scale-across | 2 |
| 02_companies/DeepSeek | 2 |
| 04_knowledge_base/RoCEv2 | 2 |
| 04_knowledge_base/Pipeline parallelism | 2 |
| 02_companies/MSFT | 2 |
| 04_knowledge_base/基板 | 2 |
| 04_knowledge_base/Tensor Parallelism | 2 |
| 04_knowledge_base/GB300 | 2 |
| 04_knowledge_base/Congestion Control | 2 |
| 04_knowledge_base/Design Rule | 2 |
| 04_knowledge_base/UALoE72 | 2 |
| 04_knowledge_base/DIMM | 2 |
| 04_knowledge_base/Model parallelism | 2 |
| 04_knowledge_base/TPUv4 | 2 |
| 04_knowledge_base/Eager mode | 2 |
| 04_knowledge_base/Semiconductor Fab | 2 |
| 04_knowledge_base/TPUv7 | 2 |
| 04_knowledge_base/Cableless Design | 2 |
| 04_knowledge_base/Trainium 4 | 1 |
| 04_knowledge_base/TorchTitan | 1 |
| 04_knowledge_base/MI355X | 1 |
| 02_companies/Arm Holdings | 1 |
| 04_knowledge_base/Integrated Passive Device | 1 |
| 04_knowledge_base/Organic interposer | 1 |
| 04_knowledge_base/MI355 | 1 |
| 04_knowledge_base/ABF | 1 |
| 04_knowledge_base/Blackwell Ultra | 1 |
| 04_knowledge_base/Data Parallelism | 1 |
| 04_knowledge_base/MI400 | 1 |
| 04_knowledge_base/H200 | 1 |
| 04_knowledge_base/HBM4 | 1 |
| 02_companies/APH | 1 |
| 04_knowledge_base/Sparsity | 1 |
| 02_companies/ORCL | 1 |
| 04_knowledge_base/MI325 | 1 |
| 03_industries/Neocloud產業 | 1 |
| 04_knowledge_base/HBM3 | 1 |
| 04_knowledge_base/被動元件 | 1 |
| 04_knowledge_base/Tokenomics | 1 |
| 04_knowledge_base/High-radix network | 1 |
| 04_knowledge_base/MI300 | 1 |
| 02_companies/Aligned Data Centers | 1 |
| 04_knowledge_base/EUV | 1 |
| 04_knowledge_base/NVIDIA Grace | 1 |
| 04_knowledge_base/BBU | 1 |
| 04_knowledge_base/NVIDIA Kyber Rack | 1 |
| 02_companies/SNPS | 1 |
| 04_knowledge_base/Hopper | 1 |
| 02_companies/COHR | 1 |
| 04_knowledge_base/ROCm | 1 |
| 02_companies/FLEX | 1 |
| 04_knowledge_base/Blackwell | 1 |
| 04_knowledge_base/NVLink 6 Switch | 1 |
| 04_knowledge_base/Scale-up networking | 1 |
| 02_companies/CRWV | 1 |
| 04_knowledge_base/HVLP copper foil | 1 |
| 04_knowledge_base/Chip-to-Chip Interconnect | 1 |
| 04_knowledge_base/Quantization | 1 |
| 04_knowledge_base/Transformer architecture | 1 |
| 02_companies/Arista | 1 |
| 04_knowledge_base/Triton | 1 |
| 04_knowledge_base/Vertical Power Delivery | 1 |
| 04_knowledge_base/High Aspect Ratio | 1 |
| 04_knowledge_base/NVIDIA B300 | 1 |
| 04_knowledge_base/FP16 | 1 |
| 04_knowledge_base/Photomask Set | 1 |
| 04_knowledge_base/E2E latency | 1 |
| 04_knowledge_base/CLOS network | 1 |
| 04_knowledge_base/DR8 | 1 |
| 04_knowledge_base/Interconnect Stack | 1 |
| 04_knowledge_base/Merchant Silicon | 1 |
| 04_knowledge_base/Teton3 | 1 |
| 04_knowledge_base/Inter-chip interconnect | 1 |
| 04_knowledge_base/Virtual Machine | 1 |
| 04_knowledge_base/NVIDIA Nsight Compute | 1 |
| 04_knowledge_base/BEOL | 1 |
| 04_knowledge_base/Via | 1 |
| 04_knowledge_base/NVIDIA B200 | 1 |
| 04_knowledge_base/Defect Density | 1 |
| 04_knowledge_base/VLIW | 1 |
| 04_knowledge_base/All-Reduce | 1 |
| 04_knowledge_base/MultiPath Reliable Connection | 1 |
| 04_knowledge_base/Elastic Network Adapter | 1 |
| 04_knowledge_base/Teton3 Max | 1 |
| 04_knowledge_base/Reticle | 1 |
| 04_knowledge_base/XCD | 1 |
| 04_knowledge_base/TSMC N5 | 1 |
| 04_knowledge_base/Scalable Reliable Datagram | 1 |
| 04_knowledge_base/Inference engine | 1 |
| 04_knowledge_base/ZR Optics | 1 |
| 04_knowledge_base/Tensor Core | 1 |
| 04_knowledge_base/Control Plane | 1 |
| 04_knowledge_base/Logical NeuronCore | 1 |
| 04_knowledge_base/FinFLEX | 1 |
| 04_knowledge_base/400G Y-Cable | 1 |
| 04_knowledge_base/DR4 | 1 |
| 04_knowledge_base/QM9700 | 1 |
| 04_knowledge_base/AMD Instinct MI250X | 1 |
| 04_knowledge_base/FLOP | 1 |
| 04_knowledge_base/Busbar | 1 |
| 04_knowledge_base/NeuronLinkv3 | 1 |
| 04_knowledge_base/Cold plate | 1 |