| 04_knowledge_base/DRAM | 98 |
| 04_knowledge_base/Capacitor | 38 |
| 04_knowledge_base/HBM | 37 |
| 04_knowledge_base/Bitline | 34 |
| 04_knowledge_base/Transistor | 28 |
| 04_knowledge_base/3D DRAM | 18 |
| 04_knowledge_base/Wordline | 16 |
| 02_companies/000660 | 13 |
| 04_knowledge_base/Sense Amplifier | 13 |
| 04_knowledge_base/封裝 | 12 |
| 02_companies/MU | 12 |
| 04_knowledge_base/微影製程 | 10 |
| 04_knowledge_base/NAND Flash | 10 |
| 04_knowledge_base/GPU | 10 |
| 04_knowledge_base/CPU | 9 |
| 04_knowledge_base/DDR5 | 8 |
| 04_knowledge_base/Memory Cell | 8 |
| 04_knowledge_base/HBM4 | 7 |
| 04_knowledge_base/Contact | 7 |
| 04_knowledge_base/HBM3E | 6 |
| 04_knowledge_base/LPDDR5X | 6 |
| 04_knowledge_base/CMOS | 6 |
| 04_knowledge_base/High Aspect Ratio | 6 |
| 04_knowledge_base/NVIDIA Grace | 5 |
| 04_knowledge_base/Vertical Channel Transistor | 5 |
| 04_knowledge_base/LPDDR | 5 |
| 04_knowledge_base/SRAM | 5 |
| 04_knowledge_base/Semiconductor Fab | 5 |
| 04_knowledge_base/Deposition | 5 |
| 04_knowledge_base/Feature Size | 5 |
| 02_companies/CXMT | 4 |
| 04_knowledge_base/JEDEC | 4 |
| 04_knowledge_base/AI Accelerator | 4 |
| 04_knowledge_base/Hybrid Bonding | 4 |
| 04_knowledge_base/Moore’s Law | 4 |
| 04_knowledge_base/DDR | 4 |
| 04_knowledge_base/Vertical Bitline | 4 |
| 02_companies/Applied Materials | 3 |
| 04_knowledge_base/EUV | 3 |
| 04_knowledge_base/SiGe | 3 |
| 02_companies/INTC | 3 |
| 04_knowledge_base/Chiplet architecture | 3 |
| 02_companies/NVDA | 3 |
| 04_knowledge_base/MRAM | 3 |
| 04_knowledge_base/Etching | 3 |
| 04_knowledge_base/FeRAM | 3 |
| 04_knowledge_base/Via | 3 |
| 04_knowledge_base/LPDDR6 | 2 |
| 04_knowledge_base/ASIC | 2 |
| 02_companies/Switch | 2 |
| 02_companies/AMD | 2 |
| 02_companies/Together AI | 2 |
| 04_knowledge_base/UCIe | 2 |
| 02_companies/2330 台積電 | 2 |
| 04_knowledge_base/HBM3 | 2 |
| 04_knowledge_base/H100 | 2 |
| 04_knowledge_base/GDDR7 | 2 |
| 04_knowledge_base/Compute-in-Memory | 2 |
| 04_knowledge_base/GDDR6X | 2 |
| 04_knowledge_base/Logic Process | 2 |
| 04_knowledge_base/Aspect Ratio | 2 |
| 04_knowledge_base/Critical dimension | 2 |
| 04_knowledge_base/High Volume Manufacturing | 2 |
| 04_knowledge_base/Emerging Memory | 2 |
| 04_knowledge_base/Wafer bonding | 2 |
| 04_knowledge_base/Overlay | 2 |
| 04_knowledge_base/Cost per Transistor | 2 |
| 04_knowledge_base/Dennard scaling | 1 |
| 04_knowledge_base/NVLink-C2C | 1 |
| 04_knowledge_base/CXL | 1 |
| 04_knowledge_base/Flash memory | 1 |
| 04_knowledge_base/Blackwell | 1 |
| 02_companies/AAPL | 1 |
| 04_knowledge_base/AMD MI300A | 1 |
| 04_knowledge_base/Hopper | 1 |
| 04_knowledge_base/HBM4E | 1 |
| 03_industries/記憶體產業 | 1 |
| 04_knowledge_base/LPDDR5 | 1 |
| 04_knowledge_base/3D integration | 1 |
| 02_companies/IBM | 1 |
| 04_knowledge_base/DDR4 | 1 |
| 02_companies/Kioxia | 1 |
| 04_knowledge_base/MI300X | 1 |
| 04_knowledge_base/CoWoS | 1 |
| 04_knowledge_base/2nm | 1 |
| 04_knowledge_base/Photoresist | 1 |
| 04_knowledge_base/Multi-Patterning | 1 |
| 04_knowledge_base/3nm | 1 |
| 04_knowledge_base/MR-MUF | 1 |
| 04_knowledge_base/Stacked memory | 1 |
| 03_industries/Foundry | 1 |
| 04_knowledge_base/Peripheral Circuit | 1 |
| 04_knowledge_base/Gate-All-Around | 1 |
| 04_knowledge_base/GDDR | 1 |
| 04_knowledge_base/Compute Tray | 1 |
| 04_knowledge_base/GDDR6 | 1 |
| 04_knowledge_base/Cryo etch | 1 |
| 04_knowledge_base/Backside Power Delivery | 1 |
| 04_knowledge_base/FinFET | 1 |
| 04_knowledge_base/Line Space | 1 |