| 04_knowledge_base/RISC-V | 43 |
| 04_knowledge_base/CPU | 41 |
| 04_knowledge_base/Chiplet architecture | 22 |
| 02_companies/INTC | 14 |
| 02_companies/AMD | 12 |
| 02_companies/AAPL | 10 |
| 04_knowledge_base/IO Die | 10 |
| 04_knowledge_base/GPU | 9 |
| 02_companies/Rivos | 8 |
| 04_knowledge_base/Hyperscaler | 6 |
| 04_knowledge_base/封裝 | 3 |
| 02_companies/Amazon | 3 |
| 02_companies/2330 台積電 | 3 |
| 02_companies/GOOG | 3 |
| 04_knowledge_base/ASIC | 3 |
| 04_knowledge_base/UCIe | 3 |
| 04_knowledge_base/Graviton3 | 3 |
| 04_knowledge_base/Sapphire Rapids | 2 |
| 02_companies/Mobileye | 2 |
| 02_companies/MU | 2 |
| 04_knowledge_base/AMD EPYC Genoa | 2 |
| 04_knowledge_base/Microbumps | 2 |
| 04_knowledge_base/CXL | 2 |
| 02_companies/Kioxia | 2 |
| 02_companies/QCOM | 2 |
| 04_knowledge_base/SMT | 2 |
| 04_knowledge_base/Verilog | 2 |
| 04_knowledge_base/PCIe | 2 |
| 02_companies/Ampere Computing | 2 |
| 04_knowledge_base/SoC | 2 |
| 04_knowledge_base/RISC-V Vector Extension | 2 |
| 04_knowledge_base/Zen 4 | 2 |
| 04_knowledge_base/SSD | 2 |
| 04_knowledge_base/AI inference | 1 |
| 04_knowledge_base/Design IP | 1 |
| 02_companies/Marvell | 1 |
| 04_knowledge_base/DDR5 | 1 |
| 04_knowledge_base/Electronic Design Automation | 1 |
| 04_knowledge_base/Moore’s Law | 1 |
| 04_knowledge_base/Ethernet | 1 |
| 02_companies/META | 1 |
| 04_knowledge_base/Intel 18A | 1 |
| 04_knowledge_base/NAND Flash | 1 |
| 04_knowledge_base/Chip-to-Chip Interconnect | 1 |
| 04_knowledge_base/AMBA CHI | 1 |
| 02_companies/Switch | 1 |
| 04_knowledge_base/NVIDIA Grace | 1 |
| 04_knowledge_base/Sparsity | 1 |
| 02_companies/Alphawave Semi | 1 |
| 04_knowledge_base/基板 | 1 |
| 04_knowledge_base/AP | 1 |
| 04_knowledge_base/RTL | 1 |
| 02_companies/MSFT | 1 |
| 02_companies/Baidu | 1 |
| 04_knowledge_base/Out-of-Order Core | 1 |
| 04_knowledge_base/RISC-V Core | 1 |
| 04_knowledge_base/Tenstorrent Blackhole | 1 |
| 04_knowledge_base/7nm | 1 |
| 03_industries/Foundry | 1 |
| 04_knowledge_base/Conditional Execution | 1 |
| 04_knowledge_base/Ice Lake | 1 |
| 04_knowledge_base/L3 cache | 1 |
| 04_knowledge_base/Packet Processing | 1 |
| 04_knowledge_base/TPU | 1 |
| 04_knowledge_base/Process node | 1 |
| 04_knowledge_base/Dynamic Routing | 1 |
| 04_knowledge_base/Conditional Routing | 1 |
| 04_knowledge_base/HDD | 1 |
| 04_knowledge_base/Buda | 1 |