2022-03-03_graphcore-announces-worlds-first
Canonical Target Counts
| Target | Occurrences |
|---|
| 04_knowledge_base/Hybrid Bonding | 13 |
| 02_companies/2330 台積電 | 13 |
| 04_knowledge_base/Wafer-on-Wafer | 11 |
| 04_knowledge_base/封裝 | 9 |
| 02_companies/NVDA | 9 |
| 04_knowledge_base/Capacitor | 8 |
| 04_knowledge_base/Chip-on-Wafer | 5 |
| 04_knowledge_base/矽晶圓 | 5 |
| 04_knowledge_base/Deep Trench Capacitor | 5 |
| 04_knowledge_base/SoIC | 4 |
| 04_knowledge_base/A100 | 4 |
| 04_knowledge_base/Hopper | 3 |
| 04_knowledge_base/GPU | 3 |
| 04_knowledge_base/Wafer bonder | 3 |
| 04_knowledge_base/7nm | 3 |
| 04_knowledge_base/AI Accelerator | 2 |
| 02_companies/TSLA | 2 |
| 02_companies/MU | 2 |
| 04_knowledge_base/Semiconductor manufacturing | 2 |
| 02_companies/Applied Materials | 2 |
| 04_knowledge_base/CoWoS | 2 |
| 04_knowledge_base/TSV | 2 |
| 04_knowledge_base/Deposition | 2 |
| 04_knowledge_base/Transistor | 2 |
| 04_knowledge_base/DRAM | 1 |
| 02_companies/INTC | 1 |
| 04_knowledge_base/CMP | 1 |
| 04_knowledge_base/SRAM | 1 |
| 04_knowledge_base/Chip-to-Chip Interconnect | 1 |
| 04_knowledge_base/Foveros | 1 |
| 02_companies/YMTC | 1 |
| 02_companies/SONY | 1 |
| 04_knowledge_base/3D integration | 1 |
| 02_companies/Together AI | 1 |
| 04_knowledge_base/NAND Flash | 1 |
| 04_knowledge_base/Thermal Compression Bonding | 1 |
| 02_companies/AMD | 1 |
| 02_companies/Cirrascale | 1 |
| 02_companies/SMCI | 1 |
| 02_companies/EV Group | 1 |
| 04_knowledge_base/eDTC | 1 |
| 04_knowledge_base/HBM | 1 |
| 04_knowledge_base/BGA | 1 |
| 04_knowledge_base/Bow Pod | 1 |
| 04_knowledge_base/Fusion Bonding | 1 |
| 04_knowledge_base/Weak scaling | 1 |
| 04_knowledge_base/DGX | 1 |
| 04_knowledge_base/3D V-Cache | 1 |
| 04_knowledge_base/Wafer thinning | 1 |
| 04_knowledge_base/Design Rule | 1 |
| 04_knowledge_base/Via | 1 |
| 04_knowledge_base/Plasma dicing | 1 |
| 04_knowledge_base/Process node | 1 |
| 04_knowledge_base/Photoresist | 1 |
| 04_knowledge_base/MLPerf | 1 |
| 04_knowledge_base/CPU | 1 |